|Table of Contents|

Design of Encoder for Low Density Parity Check Codes in Verilog HDL based on Half Random Matrix(PDF)

南京师范大学学报（工程技术版）[ISSN:1006-6977/CN:61-1281/TN]

Issue:
2006年02期
Page:
34-37
Research Field:
Publishing date:

Info

Title:
Design of Encoder for Low Density Parity Check Codes in Verilog HDL based on Half Random Matrix
Author(s):
YIN Xiaoqi; YIN Kuixi ; ZHAO Hua ; KE Wei
School of Physical Science and Technology, Nanjing Normal University, Nanjing 210097, China; Department of Electronics and Information Engineering, Huaiyin Institute of Technology, Huaian 223001, China
Keywords:
-
PACS:
TN762
DOI:
-
Abstract:
-

References:

-

Memo

Memo:
-
Last Update: 2013-04-29