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A Design of Circuit System Based on CPLD in Dual-Port RAM(PDF)

南京师范大学学报（工程技术版）[ISSN:1006-6977/CN:61-1281/TN]

Issue:
2011年01期
Page:
68-72
Research Field:
Publishing date:

Info

Title:
A Design of Circuit System Based on CPLD in Dual-Port RAM
Author(s):
Ge Xuefeng1; 2; Shi Bin1; Zhu Xiaoshu1; Luo Xiaobing3
1.Center for Analysis and Testing,Nanjing Normal University,Nanjing 210046,China; 2.College of Science,Nanjing University of Aeronautics and Astronautics,Nanjing 211106,China; 3.School of Physical Science and Technology,Nanjing Normal University,Nanjing 210097,China
Keywords:
CPLD; dual-port RAM; data sampling
PACS:
TP333.8
DOI:
-
Abstract:
Dual-port RAM plays an important role in intelligent instrument of high-speed data acquisition． The scheme and the circuit of dual-port RAM，which are high in speed，large in volume and low in cost，are introduced in this paper． The approach was adopted by programming logic circuit in complicated programmable logic device ( CPLD) ． The simulation result of dual-port RAM is verified correct in the timing，the outcome of reading operation and writing operation． The design，which helps the quick development of data sampling and processing instrument，solves the shortage of high-speed，large-volume and low-cost dual-port RAM．

References:

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Last Update: 2013-03-21