[1]徐 霞,张 强,罗小彬,等.基于FPGA的高速数据采集控制技术的研究[J].南京师范大学学报(工程技术版),2016,16(04):015.[doi:10.3969/j.issn.1672-1292.2016.04.003]
　Xu Xia,Zhang Qiang,Luo Xiaobin,et al.A Study on High-Speed Data Acquisition Control TechnologyBased on the FPGA[J].Journal of Nanjing Normal University(Engineering and Technology),2016,16(04):015.[doi:10.3969/j.issn.1672-1292.2016.04.003]
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基于FPGA的高速数据采集控制技术的研究
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南京师范大学学报（工程技术版）[ISSN:1006-6977/CN:61-1281/TN]

卷:
16卷
期数:
2016年04期
页码:
015
栏目:
电气与电子工程
出版日期:
2016-12-31

文章信息/Info

Title:
A Study on High-Speed Data Acquisition Control TechnologyBased on the FPGA
文章编号:
1672-1292(2016)04-0015-07
作者:
徐 霞; 张 强; 罗小彬; 徐寅林
南京师范大学物理科学与技术学院,江苏 南京 210023
Author(s):
Xu Xia; Zhang Qiang; Luo Xiaobin; Xu Yinlin
School of Physics and Technology,Nanjing Normal University,Nanjing 210023,China
关键词:
高速采样控制; FPGA; A/D转换
Keywords:
high-speed sampling control; FPGA; A/D conversion
分类号:
TN79.2
DOI:
10.3969/j.issn.1672-1292.2016.04.003
文献标志码:
A
摘要:
传统的数据采集一般都是基于CPU控制下的A/D转换及数据存储技术. 由于受到CPU指令执行时序的限制,这种控制模式很难突破1 MHz以上的数据采样速率. 本文介绍一种基于FPGA的高速A/D转换、数据采集、存储控制技术. 数据采集系统采用ALTERA公司的FPGA芯片EP4CE6E22C8N为控制器,产生高速A/D转换器及大容量SDRAM存储器工作所需要的控制时序信号,对采集速率可达100 MHz的高速A/D转换芯片AD9283进行采样控制及快速缓存处理. 整个设计在QuartusⅡ与KeilC-51平台下,运用Verilog语言及C语言描述软件编程,正确实现了AD9283转换的工作时序控制及采样的数据存储处理.
Abstract:
The traditional data acquisition are generally based on CPU under the control of A/D conversion and data storage technology. Due to the limitation of CPU instruction execution time series,this kind of control mode is difficult to break through the above 1 MHz data sampling rate. This paper introduces a kind of high-speed A/D conversion based on FPGA,data acquisition,storage control technology. The data acquisition system adopts FPGA chip EP4CE6E22C8N of ALTERA company as the controller,to produce high-speed A/D converter and the large capacity SDRAM memory work required sequence control signal,the collected rate of up to 100 MHz high speed A/D conversion chip AD9283 sampling control and deal with fast cache. The whole design is on the QuartusⅡ with KeilC-51 platform,by using Verilog language and C language,designs software programming,correctly implements AD9283 transformation work timing control and sampling data storage process.

参考文献/References:

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备注/Memo

备注/Memo:
收稿日期:2016-07-29.
通讯联系人:徐寅林,博士,教授,研究方向:精密仪器仪器设计. E-mail:xuyinlin@njnu.edu.cn
更新日期/Last Update: 2016-12-31