[1]Rambhatla A,Hackler D R,Parke S A.寻求最终亚-50纳米CMOS器件结构(英文)[J].南京师范大学学报(工程技术版),2003,03(04):051-54.
　Rambhatla A,Hackler D R,Parke S A.Quest for the Ultimate Sub-50 nm CMOS Transistor Structure[J].Journal of Nanjing Normal University(Engineering and Technology),2003,03(04):051-54.
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寻求最终亚-50纳米CMOS器件结构(英文)
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南京师范大学学报（工程技术版）[ISSN:1006-6977/CN:61-1281/TN]

卷:
03卷
期数:
2003年04期
页码:
051-54
栏目:
出版日期:
2003-12-30

文章信息/Info

Title:
Quest for the Ultimate Sub-50 nm CMOS Transistor Structure
作者:
Rambhatla A1 ;  Hackler D R2 ;  Parke S A1
( 1. 美国爱达荷州BOISE 州立大学电气与计算机系, 83725, 爱达荷州)
(2. 美国半导体有限公司, 83725, 爱达荷州)
Author(s):
Rambhatla A 1;  Hackler D R 2;  Parke S A 1
( 1. Department of Electrical & Computer Engineering, Boise State University, 83725, Idaho, USA)
( 2.Ameri can Semiconductor Inc, 83725, Idaho, USA)
关键词:
CMOS器件;  非典型结构;  晶体管结构
Keywords:
CMOS;  non- classical CMOS structure;  transistor structure
分类号:
TN432
摘要:
主要介绍了对各种非典型CMOS结构的研究 ,从而寻求最终的结构模式适应不断变化的CMOS发展技术 .
Abstract:
In this paper, the work is introduced on investigation on non- classical CMOS structure in the quest to find the u-l timate transistor structure that will permit evolutionary improvements of the existing CMOS technology base.

参考文献/References:

[ 1] Wong H S P. Design and performance considerations for sub-0. 1μm doube-l gate SOI MOSFETs[ A] . International Electronic Device Meeting, 1994.
[ 2] Wong H S P, Chan K K, Taur Y. Sel-f aligned doube-l gate MOSFET with a 25 nm thick channel[ A] . International Electronic Device Meeting, 1997. 427~ 430.
[ 3] Wong H S P, Frank D J, Solomon P M. Device design considerations for double-gate, ground plane, and single- gated ultra- thin SOI MOSFETs at the 25 nm channel length[ A] . International Electronic Device Meeting, 1998. 407~ 410.

备注/Memo

备注/Memo:
Biography: Rambhatla A, Indian, born in 1979, Master graduate at Department of Electrical& Computer Engineering, Boise State University; his research interest includes IC design, device modeling and characterizat ion.
更新日期/Last Update: 2013-04-29